Field effect transistor type semiconductor sensor and method of manufacturing the same

ABSTRACT

In a semiconductor sensor, the surfaces of first and second semiconductor substractes of a first conductivity type are made into flat surfaces by polishing the surfaces and are contacted each other so that the both substrates are bonded together. Source and claim regions are formed by diffusing an impurity of second conductivity type. The source and claim regions are separated through a through hole formed in the second substrate and are extended along the surface of the second substrate. An insulative layer is formed on the opposite surface of the second substrate and an inner surface of the through hole.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor sensor and, moreparticularly, to a field effect transistor type sensor for detecting aspecific component in a solution.

A chemical sensor of field effect transistor (FET) type, i.e., ISFET(ion selective field effect transistor), comprises a silicon substrate,source and drain regions which are formed on the surface of thesubstrate, and an insulative film. A gate portion of the sensor isdipped in a solution so that a change in conductance between the sourceand drain regions, which corresponds to an ion concentration in thesolution, is detected. In such a chemical sensor, since the gate portionis placed in direct contact with the solution, a contact surface thereofmust be insulated. For this purpose, the device is coated with a gateinsulative film (a silicon oxide film, or the like), and an insulativefilm acting as a protective film or a passivation film e.g., a siliconnitride film. Part of the insulative film is selectively etched to forma wiring layer connected to source and drain diffusion layers, and ametal deposition film or metal wiring is deposited on the etchedportion, thus preparing a connecting portion for the external circuit.

Chemical sensors having structures shown in FIGS. 1A, 1B, 2A, 2B, and 3have been known.

The sensor shown in FIGS. 1A and 1B has a probe-like shape. In thesensor shown in FIGS. 1A and 1B, n⁺ -type drain region 2 is formed onthe surface of p-type silicon substrate 1, and n⁺ -type source region 3is so formed on the surface of the substrate as to surround drain region2. Silicon oxide film 4 and silicon nitride film 5, which respectivelyserve as a gate insulative film and a protective film, are deposited onthe entire surface of silicon substrate 1. In this structure, a gateportion of the FET is defined by the source and drain regions at oneside of substrate 1, a channel region therebetween, and the insulativefilm. Insulative film 4 on the other side of source and drain regions 2and 3 is selectively etched, and metal films 6 and 7 serving as contactlayers are formed thereon.

In the chemical sensor of this type, however, when part of siliconsubstrate 1 is exposed, current leakage occurs between elements in thesolution. Because of this, insulative film 4 must be formed on theentire circumferential surface of substrate 1. Since wafers cannot bedirectly subjected to an insulative film forming process, chips havingan outer shape like the sensor must be cut from the wafer, andthereafter, the insulative film must be formed on individual chips. Forthis reason, this conventional method is unsuitable for mass-production,and the chips are easily damaged during their manufacture. Even if achip is not damaged during manufacture, the resultant sensor has adecrease in mechanical strength because it receives a liquid pressure ononly one side of substrate 1.

A sensor shown in FIGS. 2A and 2B has an SOS (Silicon On Sapphire)structure. In this sensor, p-type silicon island layer 12 is formed onsapphire substrate 11, and n⁺ -type source and drain regions 13 and 14are formed thereon. Silicon oxide film 15 and silicon nitride film 16,respectively serving as a gate insulative film and a protective film,are formed on the surface of the silicon layer 12. In the sensor of thistype, a gate portion of the FET is constituted by the source and drainregions, a channel region therebetween, and the insulative film on oneside of silicon layer 12. Part of the insulative film is selectivelyetched on the other side of source and drain regions 13 and 14, andmetal films 17 and 18 are formed as contact layers on the etchedportion.

In the chemical sensor of the SOS structure, all the manufacturingprocesses can be performed in a planar process, allowingmass-production. When a plurality of elements are formed and each has amultistructure, element isolation is complete. However, since siliconlayer 12 epitaxially grown on sapphire substrate 11 is thin (e.g., 1 μmor less), the wiring resistance of source and drain regions 13 and 14becomes high, thus impairing the sensitivity of the sensor.

When the SOS substrate is used, it is necessary to dope Al from thesapphire layer. Further, the SOS substrate is inferior to bulk siliconin terms of crystallinity. The necessary Al doping and the poorcrystallinity result in various problems such as low hole mobility andshort lifetime. In addition, the SOS substrate is every expensive due tothe use of a sapphire layer. Still further, the crystal defect willlikely to increase when the substrate is heat-treated, because of thedifference in thermal expansion coefficient between silicon andsapphire.

In a sensor shown in FIG. 3, n⁺ -type source and drain regions 22 and 23are formed on a major surface of p-type silicon substrate 21, andinsulative film 24 (e.g., a silicon nitride film or silicon oxide film)which serves as a gate insulative film and a protective film is alsoformed thereon. A portion between source and drain regions 22 and 23serves as channel region 25. A gate portion of the FET is constituted bysource and drain regions 22 and 23, channel region 25, and insulativefilm 24. Portions of insulative film 24 corresponding to source anddrain regions 22 and 23 are selectively etched, and metal films 26 and27 connected to source and drain regions 22 and 23 are deposited on theetched portions. Metal films 26 and 27 are also connected to lead wires28 and 29. The chemical sensor with this structure is adhered tomeasurement tube 30, which is partially notched, by resin 31 so as tocover the connecting portions of metal films 26 and 27 and lead wires 28and 29. The gate portion is dipped in solution 32 in tube 30 formeasurement.

The chemical sensor of this structure can be manufactured by a planarprocess and is suitable for massproduction. However, lead wires 28 and29 may become disconnected or peeled from metal films 26 and 27 inhardening the resin during the manufacturing process. In addition, whenthis sensor is used, resin 31 which is present at the same side as thedetection surface is also dipped in solution 32 and expands, thusimpairing its insulative property.

It would be difficult to form many sensor elements on the samesubstrate, without avoiding mutual interference among the elements.

In the above three types of sensors, after the passivation film isformed, it must be partially etched so as to form source and draincontact holes. Therefore, a material which is hard to be etched cannotbe used as the passivation film. Although a silicon nitride film used asthe passivation film can be easily etched by a reactive ion etchingmethod or the like, it does not always have satisfactory passivationcharacteristics and ion selectivity. To achieve these qualities, an Al₂O₃ or Ta₂ O5 film is preferably used. However, since these films arehard to etch, contact portions thereof must be masked. In this case, anelectron beam deposition method or a spattering method which allows alow-temperature treatment is used, but traps may be produced in aninterface between the substrate and the insulative film and theresultant films have poor characteristics. Although films formed by aCVD method have good characteristics, an appropriate masking materialcannot be found because of high-temperature treatment in the CVD method.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a semiconductorsensor which can be manufactured by a planar process suitable formass-production.

It is another object of the present invention to provide a method ofmanufacturing a semiconductor device suitable for mass-production.

According to the present invention, there is provided a semiconductorsensor comprising a first semiconductor substrate of a firstconductivity type having one surface and an opposite surface, a secondsemiconductor substrate of the first conductivity type having onesurface and an opposite surface, the one surface thereof being placed incontact with that of said first semiconductor substrate and said firstand second semiconductor substrates being directly bonded together, asensor region formed in one of said first and second semiconductorsubstrates, and a first insulative layer formed on at least said sensorregion.

Furthermore, according to the present invention, there is provided amethod of manufacturing a semiconductor sensor, comprising the steps offlattening, by polishing, one surfaces of first and second semiconductorsubstrates of a first conductivity type, each having one surface and anopposite surface, placing the one surfaces of said first and secondsemiconductor substrates in contact with each other and heating saidfirst and second semiconductor substrates at a temperature of not lessthan 200° C. so as to bond them together, forming sensor elements havingsensing sections in at least one of said first and second semiconductorsubstrates, coating at least said sensing sections of said sensorelements with an insulative layer, and cutting the bonded substratesinto individual sensors.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 2A are plan views schematically showing conventionalISFETs;

FIGS. 1B and 2B are sectional views taken along lines I--I and II--II ofFIGS. 1A and 2A, respectively;

FIG. 3 is a sectional view schematically showing another conventionalISFET;

FIG. 4 is a plan view schematically showing an ISFET according to anembodiment of the present invention;

FIGS. 5 and 6 are sectional views taken along lines V--V and VI--VI ofFIG. 4, respectively;

FIGS. 7A to 7D are sectional views showing steps in the manufacture ofthe ISFET shown in FIGS. 4 to 6;

FIG. 8 is a sectional view schematically showing a modification of theISFET shown in FIGS. 4 to 6;

FIGS. 9 and 11 are sectional views schematically showing ISFETsaccording to another embodiment of the present invention;

FIGS. 10 and 12 are plan views showing the ISFET of FIGS. 9 and 11;

FIGS. 13 to 16 are sectional views showing modifications of an ISFETaccording to another embodiment of the present invention;

FIG. 17 is a sectional view schematically showing an ISFET according toanother embodiment of the present invention;

FIGS. 18A to 18F are sectional views showing the steps in themanufacture of the ISFET shown in FIG. 17;

FIG. 19 is a sectional view showing the ISFET of FIG. 17 in use;

FIG. 20 is a graph comparing durabilities of the ISFET shown in FIG. 17and a conventional ISFET; and

FIG. 21 is a sectional view schematically showing a modification of theISFET shown in FIG. 17.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 4 is a plan view of an ISFET (ion selective field effecttransistor) sensor according to an embodiment of the present invention.The ISFET sensor has a structure in which second Si substrate 42 isbonded to the upper surface of first Si substrate 41 through SiO₂ layer43, as shown in FIGS. 5 and 6. Si substrate 42 is selectively formed onthe central surface portion of Si substrate 41. Source and drain regions44 and 45 are formed on the upper surface of Si substrate 42. A gateoxide film, SiO₂ film 46, is formed on the upper surface of Si substrate42. Si₃ N₄ film 47 as a passivation film is formed on the entire uppersurface of the bonded structure of Si substrates 41 and 42.

With this structure, the elements formed on Si substrate 42 arecompletely surrounded by SiO₂ film 43 and Si₃ N₄ film 47, and can becompletely passivated.

The method of manufacturing the ISFET sensor shown in FIGS. 4 and 6 willbe described with reference to FIGS. 7A to 7D.

P-type silicon wafers each having a diameter of 3 inches, a resistivityof 10 Ω.cm, a thickness of 400 μm, a boron concentration of 10¹⁵ /cm³,and (100) crystal orientation, are prepared as first and secondsubstrates 41 and 42, and the surfaces thereof to be bonded together arepolished to obtain a surface roughness of 500 Å or less, and preferably50 Å or less. These wafers are washed in a normal process using anorganic solvent, a hydrogen peroxide+sulfuric acid, aqua regia boil, ahydrofluoric acid solution, or the like, and water as needed.Thereafter, silicon wafers 41 and 42 are oxidized in a high-temperaturesteam atmosphere, thus forming 1 μm thick oxide films 43 on theirsurfaces. Thereafter, silicon wafers 41 and 42 are washed with ahydrogen peroxide+sulfuric acid and aqua regia boil and water, and arethen washed with deionized water for several minutes, thus performingthe desired surface treatment. Thereafter, the surfaces of the wafers tobe bonded are placed in contact with each other and are heat-treated inan electric furnace at a temperature of about 1,100° C. for 2 hours,thus bonding the wafers together. Any unnecessary oxide film 43 is thenremoved, as shown in FIG. 7A.

Upper Si wafer 42 is polished to obtain a thickness of 30 μm and, and isthen mirror-polished, as shown in FIG. 7B. In this way, Si wafer 42 isformed as a thin Si substrate.

As shown in FIG. 7C, an impurity is selectively ion-implanted anddiffused in Si wafer 42 to form source and drain regions 44 and 45. Atthe same time, a gate portion having a gate width of 400 μm and a gatelength of 20 μm is formed. In this process, a plurality of FET elementsare formed on substrates 41 and 42 so as to be separated each other.With this structure, since element isolation between the source anddrain regions excluding the gate portion is complete, no channel stopperis required. Thereafter, the part of Si substrate 42 other than theelement portion is etched, thus exposing SiO₂ film 43, as shown in FIG.7C.

As shown in FIG. 7D, Si substrate 42 is then oxidized to form 500 Åthick gate oxide film 46. Thereafter, 800 Å thick Si₃ N₄ film 47 isdeposited on the overall surface of the structure by a CVD method.Portions of films 47 and 46 corresponding to contact forming portionsare selectively etched and contact pads (not shown) are depositedthereon. The obtained structure is then cut into individual sensors witha known dicing method.

The thus produced ISFET as an H⁺ ion sensor exhibited selectivity ofabout 50 mV/PH like a conventional sensor, and no insulation breakdownwas found over a long period of use.

With the method described above, an ISFET in which the element portionis completely passivated can be manufactured in a normal semiconductormanufacturing process, in which a large number of elements are formed ona single wafer, and are cut into devices by dicing. Furthermore, an Sisubstrate can be used in place of an SOS substrate. For this reason, themass-production of these ISFETs is enabled, thus reducing theirmanufacturing cost.

In addition to the above advantages, an Si layer on the element formingside is sufficiently thick. For example, when a 3-inch standard wafer isused, the Si layer can have a thickness of 450 μm. With this structure,deep impurity diffusion is allowed, and resistance of wiring extendingto the contact layers can be reduced. In contrast to this, in the SOSstructure, since the Si layer is an epitaxially grown film, itsthickness is limited (e.g., 20 μm or less).

When the SOS substrate is used, it is necessary to dope Al from thesapphire layer. Further, the SOS substrate is inferior to bulk siliconin terms of crystallinity. The necessary Al doping and the poorcrystallinity result in various problems such as low hole mobility andshort lifetime. In addition, the SOS substrate is every expensive due tothe use of a sapphire layer. Still further, the crystal defect willlikely to increase when the substrate is heat-treated, because of thedifference in thermal expansion coefficient between silicon andsapphire.

The present invention is not limited to the above embodiment. Forexample, the number of elements which are formed on a single chip is notlimited to one but can be 2 or more. In this case, element isolation iscomplete, and a channel stopper is not required, thus allowing themanufacture of a multistructure element. In addition, when part of theSi substrate is left to form diffusion resistance layer 48, as shown inFIG. 8, a sensor provided with a heater can be obtained. In this deviceshown in FIG. 8, sufficiently thick Si layer can be used so thatsufficient current can be obtained and the heater characteristics can beimproved. The passivation film is not limited to an Si₃ N₄ film but canbe an insulative film (e.g., SiO₂, SiN, Al₂ O₃, or the like).Furthermore, an insulative wafer can be used instead of the Si wafer ifit can be directly bonded to the Si substrate on the element formingside. In this case, since the wafer itself is an insulator, an SiO₂ filmbetween the wafer and the Si substrate can be omitted.

An ISFET sensor according to another embodiment of the present inventionwill be described with reference to FIGS. 9 to 16.

In the ISFET shown in FIGS. 9 and 10, 2.5 mm×2.5 mm first p-type siliconsubstrate 41 having a thickness of 0.3 mm, and 4.5 mm×3 mm second p-typesilicon substrate 42 having a thickness of 200 μm are directly bondedtogether in the same manner as in the above embodiment. 1 mm×20 mmthrough hole 53 is formed at the central portion of silicon substrate42. Thus, second substrate 42 is bonded to first substrate 41 at theportion surrounding through hole 53. N⁺ -type diffusion layers 44 and45, serving as source and drain regions whose one end portions extend tothrough hole 53 and are electrically and are mechanically coupled tofirst silicon substrate 41, are formed on the surface of second siliconsubstrate 42 bonded to substrate 41. An impurity concentration of n⁺-type diffusion layers 44 and 45 is about 10¹⁸ /cm³. The other endportions of diffusion layers 44 and 45 extend to regions of substrate 42on which no substrate 41 is bonded.

Insulative film 56, serving as a gate insulative film and a protectivefilm, is formed on the surface of substrate 42 opposite to the bondingsurface, the inner wall of through hole 53, and the surface of substrate41 exposed in hole 53. P⁺ -type diffusion layer 57 acting as a groundportion is formed on the bonding surface of substrate 41, and p⁺ -typediffusion layer 58 corresponding thereto is formed on the bondingsurface side of substrate 42 (FIG. 12). Layers 57 and 58 are connectedtogether and have an impurity concentration of about 10¹⁸ /cm³.Furthermore, metal film 59 connected to n+-type diffusion layer (sourceregion) 44 and metal film 60 connected to n⁺ -type diffusion layer(drain region) 45 are formed on the surface of substrate 42. Lead wires61 and 62 are connected to metal films 59 and 60, respectively.

In the semiconductor sensor of this type, a region of substrate 41between n⁺ -type diffusion regions 44 and 45 is defined as a channelregion having a channel length of 20 μm and a channel width of 1,000 μm,and insulative film 56 is formed thereon, thus constituting a gateportion of the FET in the deepest portion of through hole 53. Thesurface of the sensor on which insulative film 56 is formed serves asthe detection surface, and is dipped in a solution. The connectingportions between n⁺ -type diffusion layers 44 and 45 (i.e., the sourceand drain regions) and lead wires 61 and 62 are formed on the surfaceopposite to the detection surface.

Since the semiconductor sensor of this embodiment can be mounted along atube wall, it can provide high mechanical strength or will not obstructthe flowpath of a solution in a measurement tube, unlike theconventional semiconductor sensor shown in FIGS. 1A and 1B. For example,when the sensor is mounted as a part of a tube, since only the detectionsurface is dipped in the solution, the source and drain connectingportions need not be covered with a resin, unlike the conventionalsemiconductor sensor shown in FIG. 3. Therefore, poor insulation due toexpansion of the resin will not occur.

The semiconductor sensor shown in FIGS. 9 and 10 is manufactured in thefollowing manner.

A p-type silicon wafer is cut and mirror-polished to prepare firstsilicon substrate 41 in the same manner as in the above embodiment. Anoxide film is formed on the bonding surface of substrate 41, and ispartially etched by a photoetching method. P⁺ -type diffusion layer 57acting as a ground portion is formed by impurity diffusion, and theoxide film is then removed. Meanwhile, a p-type silicon wafer is cut andmirrorpolished to prepare second silicon substrate 42 in the same manneras above. An n⁺ -type diffusion layer acting as the source and drainregions and p⁺ -type diffusion layer 58 as the ground portion aresequentially formed on substrate 42 through the same oxide film forming,photoetching, and impurity diffusion processes as for substrate 41. Inthis case, the n⁺ -type diffusion layers can be formed separately fromeach other or as one layer. The central portion of substrate 42 is thenselectively etched to form through hole 53. Thereafter, n⁺ -typediffusion layers 44 and 45 are formed so that their one end portionsextend to the inner wall of through hole 53. The bonding surfaces offirst and second substrates 41 and 42 are washed with water to provide ahydrophilic property, are placed in tight contact with each other, andare heat-treated in air at a temperature of 1,000° C. for 2 hours, thusbonding them together.

The bonded structure is washed with a hydrofluoric acid based etchingsolution to remove the oxide film formed on the surfaces thereof.Insulative film 56 is formed on the surface of the structure, and aresist pattern is then formed on the detection surface. Insulative film56 is then selectively removed, using the resist pattern as a mask. As aresult, as shown in FIG. 9, insulative film 56 is left only on thedetection surface. Film 56 can be a silicon oxide film or siliconnitride film, or can be a two-layered structure of the silicon oxidefilm with the silicon nitride film formed thereon. In the latter case,for example, a 500 Å thick silicon oxide film is formed on substrate 42in O₂ atmosphere containing O₂ or HCl at a temperature of 1,100° C., anda 1,000 Å thick silicon nitride film is then formed thereon by areduced-pressure CVD method, thus preparing the two-layered insulativefilm. Next, Cr and Au films are sequentially deposited on the entiresurface of the structure, and are then patterned to form metal films 59and 60 of the connecting portion. Lead wires 61 and 62 are thenconnected to films 59 and 60 by a wire bonding method or the like.

Various methods for bonding silicon substrates have been known. Forexample, two silicon substrates can be bonded using an organic or aglass-based adhesive. However, since a relatively thick insulative layeris undesirably formed between two substrates, this method cannot beapplied to the manufacture of the semiconductor sensor shown in FIG. 9.Alternatively, an SiO₂ layer containing Na and the like is formed on thesurface of one substrate, and the two substrates are bonded by applyinga high voltage through this layer. However, this method cannot beadopted in the sensor in FIG. 9 for the same reason as above.

In another method, one substrate in which Na and the like is diffused isplaced in contact with another, and high voltage is applied thereto tobond them together. In this method, however, since the resistance of thesource and drain regions varies due to the Na⁺ ion diffusion, thismethod cannot be adopted in the sensor of FIG. 9.

The direct bonding method adopted in this embodiment is free from theabove drawbacks. Since two substrates can be bonded to provide apressure resistance of 100 kg/cm², the sensor of this embodiment can beused in the measurement of a compressed solution.

Output characteristics with respect to a change in pH were measuredusing the semiconductor sensor of this embodiment and a buffer solution,as a solution to be measured. In this measurement, a saturated calomelelectrode (SEC) was used as a reference electrode, and a current betweenthe source and drain was fed back to the reference electrode by a sourcefollower circuit so as to keep it constant. With the sensor of thisembodiment good output characteristics were obtained (i.e., a change ΔVGin gate potential was 50 mV/pH at pH 1 to 12).

The same test was conducted for the semiconductor sensor shown in FIGS.9 and 10 and the conventional sensor shown in FIG. 3. The sensors weremounted on measurement tubes, and pressure resistance and long-spanreliability were compared. The results are as follows. Pertaining topressure resistance, in the semiconductor sensor shown in FIG. 3,current leakage occurred at a gauge pressure of about 1.5 kg/cm², andthe sensor became disabled. In contrast to this, element characteristicsof the sensor of this embodiment were not changed when the measurementwas conducted at the gauge pressure of 2 to 10 kg/cm². When the sensorswere kept in a pH 6.8 solution for a long period of time, the outputfrom the conventional sensor became unstable after about 800 hours andfurther measurement was impossible. After 970 hours had passed, theconventional sensor was completely disabled. In contrast to this, thesemiconductor sensor shown in FIGS. 9 and 10 operated stably, even after2,000 hours.

The structure of the semiconductor sensor according to the secondembodiment of the present invention is not limited to that shown inFIGS. 9 and 10, but can be modified as follows.

In a semiconductor sensor shown in FIGS. 11 and 12, n⁺ -type diffusionlayers 63 and 64, to be connected to n⁺ -type diffusion layers 44 and 45formed on second silicon substrate 42, are formed on the bonding surfaceof first silicon substrate 41. With this structure, the source region isdefined by n⁺ -type diffusion layers 44 and 63, and the drain region byn⁺ -type diffusion layers 45 and 64. In the manufacture of this sensor,the step of forming n⁺ -type diffusion layers 63 and 64 on the surfaceof first silicon substrate 41 is added to the method of manufacturingthe sensor shown in FIGS. 9 and 10.

This structure can provide the same effects as the sensor shown in FIGS.9 and 10 with the following difference. In the former sensor, thechannel length is determined by a size of the through hole but in thelatter sensor, it is determined by the photoetching method uponformation of n⁺ -type diffusion layer 63. Therefore, either of thestructures can be selected, taking the steps in their manufacture andcontrollability of the channel length into consideration.

In the above descriptions, insulative film 56 is formed only on thedetection surface of the semiconductor sensor, as shown in FIGS. 9 and10. However, the present invention is not limited to this. For example,the insulative film can have numerous variations, as shown in FIGS. 13to 16. The sensors shown in FIGS. 13 and 14 have no n⁺ -type diffusionlayer on first silicon substrate 41, and the sensors shown in FIGS. 15and 16 have the n⁺ -type diffusion layer formed on first siliconsubstrate 41.

In the semiconductor sensor shown in FIGS. 13 and 14, thermal oxide film56 is formed on the entire surface of substrate 41, and silicon nitridefilm 66 is then formed only on the detection surface. In thesemiconductor sensor shown in FIGS. 15 and 16, thermal oxide film 56 andsilicon nitride film 66 are sequentially formed on the entire surface offirst and second silicon substrates 41 and 42. Note that in both thestructures, metal films 59 and 60 of the connecting portions are formedin such a manner that portions of the insulative film corresponding tothe metal film forming portions are selectively etched, and Cr and Aufilms are deposited thereon and are patterned thereafter.

Although p⁺ -type diffusion layer 57 is formed as a ground portion onsubstrate 41 (FIGS. 10 and 12), since first and second substrates 41 and42 are directly bonded together, p⁺ -type diffusion layer 57 on thesurface of substrate 41 is not always needed. More specifically, p⁺-type diffusion layer 58 can be formed only on substrate 42, so as toobtain ohmic contact with metal film 59, and need only be connected ton⁺ -type diffusion layer (i.e., source region) 44.

In the above-mentioned test, only a pH (hydrogen ion concentration) wasmeasured. However, the semiconductor sensor of the present invention isnot limited to this, and can be applied to the measurement of otherspecific ions.

An ISFET sensor according to another embodiment of the present inventionwill be described with reference to FIG. 17.

In the ISFET sensor shown in FIG. 17, first and second Si substrates 41and 42 are bonded together through silicon oxide film 43 in the samemanner as in the sensor shown in FIG. 5, and unlike the sensor shown inFIG. 9. Source and drain regions 44 and 45 are formed on first Sisubstrate 41, and are separated by channel region 79 and channel stopper80. In addition, metal films 59 and 60 as contact layers, which areconnected to the source and drain regions, are formed on substrate 41.

The method of manufacturing the ISFET sensor shown in FIG. 17 will bedescribed with reference to FIGS. 18A to 18F. After first and second Siwafers or substrates 41 and 42 are bonded together through silicon oxidefilm 43 in the same manner as shown in FIG. 7A, any unnecessary oxidefilm is removed from the bonded structure, thus preparing the structureshown in FIG. 18A.

First Si substrate 41 is lapped from the surface opposite to the bondingsurface to obtain a thickness of 10 μm, and is then mirror-polished.Oxide films 78 acting as etching masks are formed on the surfacesopposite to the bonding surfaces of first and second substrates 41 and42. Thereafter, the part of substrate 41 and the exposed surface ofsubstrate 42 are etched until oxide film 43 on the bonding surface isexposed, using EPW (a solution mixture of ethylenediamine-pyrocatechol-water) as an anisotropic etchant, thus forminggroove 53. When the above etchant is used, etching progresses along the(111) surface, and the etching surface is inclined. In this case, anopening of groove 53 at the bonding surface side is designed to have asquare shape with a 300 μm side.

Subsequently, oxide film 81 serving as a diffusion mask is formed on thepart of substrate 41 and the exposed surface of substrate 42. Phosphorusis then diffused from an opening of oxide film 81 formed on the surfaceof substrate 41 to the bonding surface, thus forming n⁺ -type source anddrain regions 44 and 45, separated from each other. A region betweensource and drain regions 44 and 45 serves as channel region 79. Channelregion 79 and the portions of source and drain regions 44 and 45 areformed to be exposed in groove 53 at the bonding surface side ofsubstrate 41, as shown in FIG. 18D. Then, oxide film 82 serving as adiffusion mask is formed on the part of substate 41 and the exposedsurface of substrate 42. Boron is then diffused into substrate 42 toform p⁺ -type channel stopper region 80 in the surface of substrate 41opposite to the bonding surface, as shown in FIG. 18E.

After oxide film 82 is removed from substrate 41, and the parts of oxidefilm 78 formed on the gate portion and the inner surface of groove 53are selectively removed, 800 Å thick oxide film 85 and 800 Å thick gateoxide film 83 are formed on the structure. Next, 800 Å thick siliconnitride film 84 serving as a passivation film is deposited on the entiresurface of film 85 by an LPCVD method, as shown in FIG. 18F. Siliconnitride film 84 and part of oxide film 85 are selectively etched to formcontact holes in the surface of substrate 41, opposite the bondingsurface, and corresponding to source and drain regions 44 and 45.Subsequently, Cr and Au films are sequentially deposited on the overallsurface of substrate 41 and are patterned, thus forming contact pads 59and 60. Thereafter, individual elements are cut from the wafer using adicer, and lead wires 61 and 62 are connected to pads 59 and 60, thuscompleting the chemical sensor shown in FIG. 17.

As shown in FIG. 19, the chemical sensor is mounted on a notched portionof flow cell 90 and sealed with resin 91, thus being suitable formeasuring specific ion concentration in the solution flowing throughflow cell 90.

In this chemical sensor, after first and second silicon substrates 41and 42 are bonded together through oxide film 43, all other purposes canbe performed by a planar process. In addition, since first siliconsubstrate 41, on which elements are formed, has a dielectric isolationstructure covered with an insulative film, this method is suitable formass-production.

Unlike the SOS chemical sensor shown in FIG. 3, since first siliconsubstrate 41, in which source and drain regions 44 and 45 are formed,can be thick (in the above embodiment, 10 μm after lapping), sensitivityof the sensor according to the invention will not be degraded due to anincrease in wiring resistance. In the sensor according to the invention,the substrate silicon has a good crystallization and has not the problembecause the substrates have same thermal expansion coefficients. Inaddition, since the elements are dielectrically isolated, they can havemultistructure, and a temperature detection element, an amplification oroperational element or circuit can be easily formed in addition to thechemical sensor. Since an epitaxial growth apparatus and expensivesapphire substrates are unnecessary, manufacturing costs can be reduced.

The gate and contact portions are formed on opposite surfaces and thecontact portion need not be placed in contact with a solution, thuspreventing poor insulation due to expansion of resin. Similarly, sincethe gate and contact portions are formed on the opposite surfaces, apassivation film (e.g., Al₂ O₃ or Ta₂ O₅), which has good passivationcharacteristics and ion selectivity and is hard to etch, can be formedin place of silicon nitride film 84. In the contact portion, since apassivation film having good etching properties need only be formed,selectivity can be improved even more.

Unlike a conventional sensor in which gate and contact portions are onthe same surface, the gate portion of the sensor of this embodiment doesnot require resin molding at all and resin molding can be performed onthe entire surface of the contact portion. Therefore, a given space neednot be provided in order to expose the gate portion. When the detectionelement has multistructure or when a temperature detection element, anamplification or operational element or circuit, or the like is formed,elements can be formed at minimum distances. In this way, the method ofthis embodiment can cope with higher integration.

Furthermore, since the sensor of this embodiment can be mounted alongthe wall surface of the flow cell, as shown in FIG. 19, a flow-pathresistance can be reduced.

In a test where the sensor was mounted as shown in FIG. 19 and pHresponse characteristics were measured by a source follower circuitusing a saturated calomel electrode as a reference electrode, linearresponse (i.e., about 50 mV/pH at pH 2 to 11) was obtained, and driftover time was satisfactory.

The chemical sensor of the present invention can have selectivity forother ions, in addition to hydrogen ions (pH), when various selectiveion sensitive films are formed on the gate portion. In addition, sincethe selective ion sensitive film is formed in the groove, a bondingstrength of the selective ion sensitive film is improved. Morespecifically, since a selective ion sensitive film often comprises anorganic material, it is generally difficult to bond the film to thesurface of an inorganic material element, and the film tends to swell inan aqueous solution. For this reason, when the selective ion sensitivefilm is applied to a chemical sensor of planar structure, it is easilypeeled therefrom, thereby limiting the durability of the element. Incontrast to this, when the selective ion sensitive film is formed in thegroove, as in the chemical sensor of the present invention, the grooveis placed in contact with the selective ion sensitive film over a largecontact area. When the selective ion sensitive film swells, a pressureforce acts on the film towards the substrate facing the groove, and easypeeling of the selective film is prevented thereby.

In a test of a chemical sensor using a selective ion sensitive film, aK⁺ sensor using a Valinomycin containing PVC film, an Na⁺ sensor using acrown ether containing PVC film, and a Cl⁻ sensor using an ammonium saltcontaining PVC film were produced. When characteristics of these sensorswere examined, linear response (i.e., about 50 mV/pX) was providedwithin the range of 10⁻¹ to 10⁻⁵ mol/l of K⁺ and Na⁺, and within therange of 10⁻¹ to 10⁻⁴ mol/l of Cl⁻. A change in output over time wasexamined for the Na⁺ sensor of the present invention and a Na⁺ sensorhaving a conventional planar structure by dipping them into an aqueoussolution. As shown in FIG. 20, the structure of the present inventionprovided a stable output over a long period of time, and the bondingstrength of the selective film was improved, thus prolonging sensorlife.

If insulative films formed on the surface of second silicon substrate 42opposite to the bonding surface (e.g., an oxide film serving as anetching mask, and a silicon nitride film as a passivation film) areformed to overhang groove 53, as shown in FIG. 21, the bonding strengthof selective ion sensitive film 95 formed in groove 53 can be improved.

In addition to the above selective ion sensitive films, the sensor ofthe present invention can be used with an enzyme selective sensitivefilm for glucose, urea, penicillin, or the like, or a microorganismselective sensitive film.

Furthermore, if the outer surface of the groove is covered with a gaspermeable film and an electrolytic solution or a gel is filled in thegroove, the sensor of the present invention can serve as a CO₂ gassensor.

According to the present invention as described above, a chemical sensorcan be manufactured by a planar process, is suitable formass-production, is not adversely influenced by wiring resistance orresin swelling, can use a desired passivation film, and has a goodselectivity, wide application range, and long life.

What is claimed is:
 1. A semiconductor sensor comprising:a firstsemiconductor substrate of a first conductivity type having one surfaceand an opposite surface; a second semiconductor substrate of the firstconductivity type having one surface and an opposite surface, the onesurface thereof being placed in contact with that of said firstsemiconductor substrate and said first and second semiconductorsubstrates being directly bonded together; a sensor region formed in oneof said first and second semiconductor substrates; a first insulativelayer formed on at least said sensor region which is made of onematerial selected from the group consisting of silicon nitride, siliconoxide, aluminum oxide, tantalum oxide, titanium oxide, zirconium oxide,niobium oxide, and hafnium oxide, and which further comprises a secondinsulative layer formed on said first insulative layer, and wherein saidsensor region has a field effect transistor structure for detecting anion concentration.
 2. A sensor according to claim 1, wherein said firstand second semiconductor substrates are silicon substrates.
 3. A sensoraccording to claim 1, further comprising:a silicon oxide layer formed onat least one of the one surfaces of said first and second semiconductorsubstrates, said first and second semiconductor substrates being bondedtogether through said silicon oxide layer.
 4. A sensor according toclaim 1, wherein said second insulative layer is made of a materialdifferent from that of said first insulative layer, and which isselected from the group consisting of silicon nitride, silicon oxide,aluminum oxide, tantalum oxide, titanium oxide, zirconium oxide, niobiumoxide, and hafnium oxide.
 5. A semiconductor sensor comprising:a firstsemiconductor substrate of a first conductivity type having one surfaceand an opposite surface; a second semiconductor substrate of the firstconductivity type having one surface and an opposite surface and athrough hole extending from the one surface to the opposite surfacethereof, the one surface being placed in contact with that of said firstsemiconductor substrate and said first and second semiconductorsubstrates being directly bonded together; source and drain regionsformed by diffusing an impurity of a second conductivity type in the onesurface of said second semiconductor substrate, separated by saidthrough hole, and extending along the one surface of said secondsemiconductor substrate which is in contact with said firstsemiconductor substrate; and a first insulative layer formed on theopposite surface of said second semiconductor substrate, an innersurface of said through hole, and the one surface of said firstsemiconductor substrate exposed in said through hole.
 6. A sensoraccording to claim 5, wherein said first and second semiconductorsubstrates are silicon substrates.
 7. A sensor according to claim 5,wherein said first insulative layer is made of one material selectedfrom the group consisting of silicon nitride, silicon oxide, aluminumoxide, tantalum oxide, titanium oxide, zirconium oxide, niobium oxide,and hafnium oxide.
 8. A sensor according to claim 7, further comprisinga second insulative layer formed on said first insulative layer.
 9. Asensor according to claim 8, wherein said second layer is made of amaterial different from that of said first insulative layer, and whichis selected from the group consisting of silicon nitride, silicon oxide,aluminum oxide, tantalum oxide, titanium oxide, zirconium oxide, niobiumoxide, and hafnium oxide.
 10. A sensor according to claim 5, furthercomprising:source and drain regions formed by diffusing an impurity of asecond conductivity type, separated from each other on the one surfaceof said first semiconductor substrate exposed in said through hole, andextending along the one surface of said first semiconductor substrate.11. A sensor according to claim 5, further comprising:contacts formed onthe one surface of said second semiconductor substrate and connected tosaid source and drain regions, respectively.
 12. A semiconductor sensorcomprising:a first semiconductor substrate of a first conductivity typehaving one surface and an opposite surface; a second semiconductorsubstrate on said opposite surface having one surface and an oppositesurface, and a through hole extending from the one surface to theopposite surface; a first insulative layer formed on at least the onesurfaces of said first and second semiconductor substrates, the onesurfaces being in contact with each other, and said first and secondsemiconductor substrates being bonded together through said firstinsulative layer; source and drain region formed on said firstsemiconductor substrate by diffusing an impurity of the secondconductivity type, and separated from each other on the one surface ofsaid first semiconductor substrate exposed in said through hole; and asecond insulative layer formed on the opposite surface of said secondsemiconductor substrate, an inner surface of said through hole, and theone surface of said first semiconductor substrate exposed in saidthrough hole.
 13. A sensor according to claim 12, wherein said first andsecond semiconductor substrates are silicon substrates.
 14. A sensoraccording to claim 12, wherein said first insulative layer is made ofone material selected from the group consisting of silicon nitride,silicon oxide, aluminum oxide, tantalum oxide, titanium oxide, zirconiumoxide, niobium oxide, and hafnium oxide.
 15. A sensor according to claim14, further comprising a second insulative layer formed on said firstinsulative layer.
 16. A sensor according to claim 15, wherein saidsecond layer is made of a material different from that of said firstinsulative layer, and which is selected from the group consisting ofsilicon nitride, silicon oxide, aluminum oxide, tantalum oxide, titaniumoxide, zirconium oxide, niobium oxide, and hafnium oxide.
 17. A sensoraccording to claim 12, further comprising:contacts formed on theopposite surface of said first semiconductor substrate and connected tosaid source and drain regions, respectively.
 18. A sensor according toclaim 12, further comprising:a film arranged in said through hole,wherein said film is an ion sensitive film, an enzyme or microorganismselective sensitive film, or a gas permeable film.
 19. A sensoraccording to claim 12, further comprising:a channel stopper formed inthe opposite surface of said first semiconductor substrate.